Optimisation of pedestrian detection system using FPGA-CPU hybrid implementation for vehicle industry

Abstract

Improved image processing and developing technologies are rapidly expanding the application areas of image processing systems. In recent years, pedestrian detection systems have become one of the major safety technologies used in the automotive industry. This paper presents an optimised real-time pedestrian detection system using an FPGA-CPU based hybrid design. The histograms of oriented gradients (HOG) algorithm, which is extensively used for feature extraction in pedestrian detection applications, was implemented on a low-end FPGA. In the study, the original HOG descriptors are designed in low complexity without sacrificing performance. The obtained features were classified on a low-power single board computer with support vector machine (SVM). Tests with the INRIA pedestrian database show that the proposed model has high potential for use as a real-time low-cost pedestrian detection system in practice.