Layout-Aware and Fabrication-Tolerant Deep Photonic Networks

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dc.authorid0009-0006-2890-4046
dc.authorid0000-0002-0451-643X
dc.authorid0000-0002-4102-3984
dc.authorid0009-0002-9880-0446
dc.authorid0000-0002-7370-3482
dc.authorid0009-0007-4922-3327
dc.contributor.authorVit, Aycan Deniz
dc.contributor.authorGorgulu, Kazim
dc.contributor.authorAmiri, Ali Najjar
dc.contributor.authorDanis, Bahrem Serhat
dc.contributor.authorRzayev, Ujal
dc.contributor.authorDasdemir, Ahmet Onur
dc.contributor.authorMagden, Emir Salih
dc.date.accessioned2026-02-08T15:15:41Z
dc.date.available2026-02-08T15:15:41Z
dc.date.issued2025
dc.departmentBursa Teknik Üniversitesi
dc.description.abstractWe propose a systematic approach to design complex and universally capable deep photonic networks with inherent robustness to fabrication-induced variations. We first create a framework that incorporates layers of variation-aware, custom-designed Mach-Zehnder interferometers and virtual wafer maps to optimize integrated photonic devices under fabrication imperfections. Using this framework, we propose designs for silicon-based, broadband 50/50 splitters and 5% power taps demonstrating transmissions within +/- 2% and +/- 1.5% of their respective targets across the 1.5-1.6 mu m spectrum, even in the presence of fabrication variations of +/- 15 nm in waveguide width and +/- 10 nm in thickness. Due to their consistent performance under fabrication-induced variations, we show that the potential fabrication yield for these tolerant devices is drastically higher than traditional devices. Our results underscore the effectiveness of the deep photonic network architecture in building layout-aware photonic systems, showcasing a realistic pathway towards creating inherently robust geometries with consistent performance for maximum yield and device reliability in future photonic applications.
dc.description.sponsorshipMarie Sklodowska-Curie Fellowship through the Horizon 2020 Program of the European Commission [101032147]; Scientific and Technological Research Council of Turkey (TUBITAK) [123E567]
dc.description.sponsorshipThis work was supported in part by the Scientific and Technological Research Council of Turkey (TUBITAK) under Grant 123E567 and in partby Marie Sklodowska-Curie Fellowship under Grant 101032147 through theHorizon 2020 Program of the European Commission.
dc.identifier.doi10.1109/JLT.2025.3621420
dc.identifier.endpage10848
dc.identifier.issn0733-8724
dc.identifier.issn1558-2213
dc.identifier.issue24
dc.identifier.scopus2-s2.0-105019581668
dc.identifier.scopusqualityQ1
dc.identifier.startpage10841
dc.identifier.urihttps://doi.org/10.1109/JLT.2025.3621420
dc.identifier.urihttps://hdl.handle.net/20.500.12885/5904
dc.identifier.volume43
dc.identifier.wosWOS:001632332400040
dc.identifier.wosqualityQ1
dc.indekslendigikaynakWeb of Science
dc.indekslendigikaynakScopus
dc.language.isoen
dc.publisherIeee-Inst Electrical Electronics Engineers Inc
dc.relation.ispartofJournal of Lightwave Technology
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı
dc.rightsinfo:eu-repo/semantics/closedAccess
dc.snmzWOS_KA_20260207
dc.subjectOptical waveguides
dc.subjectPerformance evaluation
dc.subjectOptimization
dc.subjectOptical interferometry
dc.subjectOptical device fabrication
dc.subjectOptical variables control
dc.subjectCorrelation
dc.subjectSemiconductor device modeling
dc.subjectCircuits
dc.subjectSilicon photonics
dc.subjectDeep photonic networks
dc.subjectfabrication tolerance
dc.subjectvirtual wafer maps
dc.subjectsilicon photonics
dc.titleLayout-Aware and Fabrication-Tolerant Deep Photonic Networks
dc.typeArticle

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